- cycles per instruction
- Вычислительная техника: тактов на команду
Универсальный англо-русский словарь. Академик.ру. 2011.
Универсальный англо-русский словарь. Академик.ру. 2011.
Cycles per instruction — In computer architecture, cycles per instruction (aka clock cycles per instruction, clocks per instruction, or CPI) is a term used to describe one aspect of a processor s performance: the number of clock cycles that happen when an instruction is… … Wikipedia
Cycles Per Instruction — In computer architecture, Cycles per instruction (clock cycles per instruction or clocks per instruction or CPI) is a term used to describe one aspect of a processor s performance: the number of clock cycles that happen when an instruction is… … Wikipedia
Instruction level parallelism — (ILP) is a measure of how many of the operations in a computer program can be performed simultaneously. Consider the following program: 1. e = a + b 2. f = c + d 3. g = e * fOperation 3 depends on the results of operations 1 and 2, so it cannot… … Wikipedia
Instructions Per Cycle — In computer architecture, Instructions Per Clock (Instruction Per Cycle or IPC) is a term used to describe one aspect of a processor s performance: the average number of instructions executed for each clock cycle. It is the multiplicative inverse … Wikipedia
Instructions per cycle — Die Maßeinheit Instructions per Cycle (IPC) bezeichnet die Anzahl der von einem Prozessor in einem Taktzyklus ausführbaren Befehle. Es handelt sich in der Regel um einen Mittelwert, da die Anzahl der ausgeführten Befehle pro Taktzyklus bei den… … Deutsch Wikipedia
Instructions per second — (IPS) is a measure of a computer s processor speed. Many reported IPS values have represented peak execution rates on artificial instruction sequences with few branches, whereas realistic workloads typically lead to significantly lower IPS values … Wikipedia
Complex instruction set computing — A complex instruction set computer (CISC) ( /ˈsɪs … Wikipedia
Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… … Wikipedia
Tandem Computers — A Tandem Computers promotional mug Tandem Computers, Inc. was the dominant manufacturer of fault tolerant computer systems for ATM networks, banks, stock exchanges, telephone switching centers, and other similar commercial transaction processing… … Wikipedia
Branch predictor — In computer architecture, a branch predictor is the part of a processor that determines whether a conditional branch in the instruction flow of a program is likely to be taken or not. This is called branch prediction. Branch predictors are… … Wikipedia
O/c — Surfréquençage Le Surfréquençage, ou Overclocking en anglais, également nommé surcadencement (puisqu on parle de machine cadencée à x, y GHz), a pour but d augmenter la fréquence de travail (mesurée en Hz) d un processeur. Cette opération n est… … Wikipédia en Français